| |
HY5PS1G421M-C4
HY5PS1G421M-E3
| 1Gb DDR2 Sdram |
HY5PS1G431AFP
HY5PS1G431CFP
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431CFP-C4
HY5PS1G431CFP-E3
HY5PS1G431CFP-S5
HY5PS1G431CFP-Y5
HY5PS1G431CLFP
HY5PS1G431CLFP-C4
HY5PS1G431CLFP-E3
HY5PS1G431CLFP-S5
HY5PS1G431CLFP-Y5
| 1Gb DDR2 Sdram |
HY5PS1G431F
| DDR2 Sdram - 1Gb |
HY5PS1G431F
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431F-C4
| DDR2 Sdram - 1Gb |
HY5PS1G431F-C4
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431F-C5
| DDR2 Sdram - 1Gb |
HY5PS1G431F-C5
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431F-E3
HY5PS1G431F-E4
HY5PS1G431F-Y5
| DDR2 Sdram - 1Gb |
HY5PS1G431F-Y5
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431F-Y6
| DDR2 Sdram - 1Gb |
HY5PS1G431F-Y6
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G431LF
HY5PS1G431LF-C4
HY5PS1G431LF-C5
HY5PS1G431LF-E3
HY5PS1G431LF-E4
HY5PS1G431LF-Y5
HY5PS1G431LF-Y6
HY5PS1G821LM
| 1Gb DDR2 Sdram |
HY5PS1G821LM-C4
HY5PS1G821LM-C5
HY5PS1G821LM-E3
HY5PS1G821LM-E4
HY5PS1G821LM-Y5
HY5PS1G821LM-Y6
HY5PS1G821M
| DDR2 Sdram - 1Gb |
HY5PS1G821M
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G821M-C4
HY5PS1G821M-E3
| 1Gb DDR2 Sdram |
HY5PS1G831CFP
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831CFP-C4
HY5PS1G831CFP-E3
HY5PS1G831CFP-S5
HY5PS1G831CFP-Y5
HY5PS1G831CLFP
HY5PS1G831CLFP-C4
HY5PS1G831CLFP-E3
HY5PS1G831CLFP-S5
HY5PS1G831CLFP-Y5
| 1Gb DDR2 Sdram |
HY5PS1G831F
| DDR2 Sdram - 1Gb |
HY5PS1G831F
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-C4
| DDR2 Sdram - 1Gb |
HY5PS1G831F-C4
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-C5
| DDR2 Sdram - 1Gb |
HY5PS1G831F-C5
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-E3
| DDR2 Sdram - 1Gb |
HY5PS1G831F-E3
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-E4
| DDR2 Sdram - 1Gb |
HY5PS1G831F-E4
HY5PS1G831F-E4
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-Y5
| DDR2 Sdram - 1Gb |
HY5PS1G831F-Y5
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831F-Y6
| DDR2 Sdram - 1Gb |
HY5PS1G831F-Y6
| * VDD=1.8V
* VDDQ=1.8V +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned t... |
HY5PS1G831LF
HY5PS1G831LF-C4
HY5PS1G831LF-C5
HY5PS1G831LF-E3
HY5PS1G831LF-E4
HY5PS1G831LF-Y5
HY5PS1G831LF-Y6
| 1Gb DDR2 Sdram |
HY5PS2G431AMP
HY5PS2G431MP
HY5PS2G831AMP
HY5PS2G831MP
| *
Dual Die Package(1Gb DDR2 * 2)
*
VDD, VDDQ=1.8V +/- 0.1V
*
All inputs and outputs are compatible with SSTL_18 interface
*
Fully differential clock inputs (CK, /CK) operation
*
Double data rate ... |
HY5PS561621AFP
| * VDD ,VDDQ =1.8 +/- 0.1V
* All inputs and outputs are compatible with SSTL_18 interface
* Fully differential clock inputs (CK, /CK) operation
* Double data rate interface
* Source synchronous-data transaction aligned to bidirecti... |
HY5PS561621F
HY5PS561621F-C4
HY5PS561621F-C5
HY5PS561621F-E3
HY5PS561621F-E4
HY5PS561621F-Y5
HY5PS561621F-Y6
HY5PS56421F
HY5PS56421F-C4
HY5PS56421F-C5
HY5PS56421F-E3
HY5PS56421F-E4
HY5PS56421F-Y6
HY5PS56821F
HY5PS56821F-C4
HY5PS56821F-C5
HY5PS56821F-E3
HY5PS56821F-E4
HY5PS56821F-Y5
HY5PS56821F-Y6
| DDR2 Sdram - 256Mb |