Semiconductors list from SN74S451N to SN74SSTV16857DGGR



SN74S451N
SN74S476
SN74S476J
SN74S476N
SN74S477
SN74S477J
SN74S477N
SN74S478
SN74S478J
SN74S478N
SN74S479
SN74S479J
SN74S479N
Programmable Read-only Memories
SN74S482
4-bit Slice Expandable Control Elements
SN74S482N
ti SN74S482, 4-Bit-Slice Expandable Control Elements
SN74S51
Dual 2-wide 2-input/3-input And-or-invert Gate
SN74S51D
ti SN74S51, Dual 2-wide 2-input And 3-input And-nOR GATEs
SN74S51DE4
SN74S51DG4
And-or-invert Gates
SN74S51DR
ti SN74S51, Dual 2-wide 2-input And 3-input And-nOR GATEs
SN74S51DRE4
SN74S51DRG4
And-or-invert Gates
SN74S51J
SN74S51N
SN74S51N3
ti SN74S51, Dual 2-wide 2-input And 3-input And-nOR GATEs
SN74S51NE4
And-or-invert Gates
SN74S64
4-2-3-2-input And/OR GATE
SN74S64D
SN74S64DR
SN74S64N
SN74S64N3
ti SN74S64, 4-2-3-2-input And-or-invert Gates
SN74S65
4-2-3-2 Input And-or-invert Gates
SN74S65D
SN74S65DR
SN74S65N
ti SN74S65, 4-2-3-2 Input And-or-invert Gates
SN74S74
Dual D-type Flip-flop
SN74S74D
ti SN74S74, Dual D-type Positive-edge-triggered Flip-flops With Preset And Clear
SN74S74DE4
DUAL D-type Positive-edge-triggered Flip-flops WITH Preset AND Clear
SN74S74DR
ti SN74S74, Dual D-type Positive-edge-triggered Flip-flops With Preset And Clear
SN74S74DRE4
DUAL D-type Positive-edge-triggered Flip-flops WITH Preset AND Clear
SN74S74N
SN74S74N3
ti SN74S74, Dual D-type Positive-edge-triggered Flip-flops With Preset And Clear
SN74S74NE4
DUAL D-type Positive-edge-triggered Flip-flops WITH Preset AND Clear
SN74S74NSR
ti SN74S74, Dual D-type Positive-edge-triggered Flip-flops With Preset And Clear
SN74S74NSRE4
DUAL D-type Positive-edge-triggered Flip-flops WITH Preset AND Clear
SN74S85
4-bit Magnitude Comparator
SN74S85D
SN74S85N
SN74S85N3
SN74S85NSR
ti SN74S85, 4-bit Binary or BCD Magnitude Comparators
SN74S86
Quad 2-input Exclusive OR GATE
SN74S86D
ti SN74S86, Quad 2-input Exclusive-OR GATEs
SN74S86DE4
Quadruple 2-input Exclusive-or Gates
SN74S86DR
ti SN74S86, Quad 2-input Exclusive-OR GATEs
SN74S86DRE4
Quadruple 2-input Exclusive-or Gates
SN74S86N
SN74S86N3
ti SN74S86, Quad 2-input Exclusive-OR GATEs
SN74S86NE4
Quadruple 2-input Exclusive-or Gates
SN74S86NSR
ti SN74S86, Quad 2-input Exclusive-OR GATEs
SN74S86NSRE4
Quadruple 2-input Exclusive-or Gates
SN74SSQE32882
EDEC SSTE32882 Compliant 28-Bit To 56-Bit Registered Buffer With Address-Parity Test This JEDEC standard, 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity is designed for operation on DDR3-registered DIMMs with VDD of 1.5 ...
SN74SSQE32882ZALR
SN74SSQE32882ZCJR
28-bit TO 56-bit Registered Buffer WITH Address Parity TEST ONE PAIR TO FOUR PAIR Differential Clock PLL Driver
SN74SSQEA32882
JEDEC SSTE32882 Compliant 28-Bit To 56-Bit Registered Buffer With Address-Parity Test This JEDEC SSTE32882-compliant, 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity is designed for operation on DDR3 registered DIMMs with...
SN74SSQEA32882ZALR
28-bit TO 56-bit Registered Buffer WITH Address Parity TEST ONE PAIR TO FOUR PAIR Differential Clock PLL Driver
SN74SSTE32882
This 28-bit 1:2 configurable registered buffer is designed for 1.425-V to 1.575-V VCC operation. One device per DIMM is required to drive up to 36 SDRAM loads (maximum 2 Ranks × 4). The SN74SSTE32882 includes a high-performance, low-jitter, low-sk...
SN74SSTE32882
13-bit TO 26-bit Registered Buffer WITH SSTL 2 Inputs AND Outputs
SN74SSTE32882ZALR
This 28-bit 1:2 configurable registered buffer is designed for 1.425-V to 1.575-V VCC operation. One device per DIMM is required to drive up to 36 SDRAM loads (maximum 2 Ranks × 4). The SN74SSTE32882 includes a high-performance, low-jitter, low-sk...
SN74SSTE32882ZALR
SN74SSTL16837
13-bit TO 26-bit Registered Buffer WITH SSTL 2 Inputs AND Outputs
SN74SSTL16837A
SN74SSTL16837ADGG
20-bit Sstl_3 Interface Universal Bus Driver With 3-state Outputs
SN74SSTL16837ADGGR
ti SN74SSTL16837A, 20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs
SN74SSTL16837DGGR
ti SN74SSTL16837, 20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs
SN74SSTL16847
SN74SSTL16847DGG
20-bit Sstl_3 Interface Buffer With 3-state Outputs
SN74SSTL16847DGGR
ti SN74SSTL16847, 20-Bit SSTL_3 Interface Buffer With 3-State Outputs
SN74SSTL16857
14-bit Sstl_2 Registered Driver With Differential Clock Inputs
SN74SSTL16857
SN74SSTL16857DGG
14-bit Sstl_2 Registered Buffer
SN74SSTL16857DGGR
ti SN74SSTL16857, 14-Bit SSTL_2 Registered Buffer
SN74SSTU32864
25-Bit Configurable Registered Buffer With SSTL_18 Inputs And Outputs
SN74SSTU32864C
SN74SSTU32864CGKER
SN74SSTU32864CZKER
SN74SSTU32864D
SN74SSTU32864DGKER
SN74SSTU32864DZKER
13-bit TO 26-bit Registered Buffer WITH SSTL 2 Inputs AND Outputs
SN74SSTU32864GKER
25-Bit Configurable Registered Buffer With SSTL_18 Inputs And Outputs
SN74SSTU32864GKER
ti SN74SSTU32864, 25-BIT Configurable Registered Buffer With SSTL_18 Inputs And Outputs
SN74SSTU32864ZKER
25-Bit Configurable Registered Buffer With SSTL_18 Inputs And Outputs
SN74SSTU32866
SN74SSTU32866GKER
SN74SSTU32866ZKER
25-Bit Configurable Registered Buffer With Address-parity Test
SN74SSTUB32864
SN74SSTUB32864ZKER
SN74SSTUB32866
SN74SSTUB32866ZKER
This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VCC operation. In the1:1 pinout configuration, only one device per DIMM is required to drive nine SDRAM loads. In the 1:2 pinout configuration, two devices pe...
SN74SSTV16857
SN74SSTV16857DGGR
ti SN74SSTV16857, 14-Bit Registered Buffer With SSTL_2 Inputs And Outputs
 
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